2019 International Workshop on Performance, Portability and Productivity in HPC (P3HPC)

Colorado Convention Center, Denver, Colorado, USA

Friday, 22 November 2019

held in conjunction with

SC19: The International Conference for High Performance Computing, Networking, Storage, and Analysis


Users and developers of scientific and engineering applications target a wide range of diverse computing platforms: from laptops and workstations, to clusters with homogeneous or heterogeneous node architectures, to the largest and most powerful supercomputers on the planet. This diversity presents the high performance computing (HPC) community with the challenge of developing software using techniques that enable software portability without unduly compromising performance or significantly impacting productivity. Although there have been some partial successes in addressing this challenge, much work remains before the community can truly claim to have productive performance portability techniques (P3).

The 2019 International Workshop on Performance, Portability and Productivity (P3HPC) provides a forum for researchers and developers to discuss their successes and failures with respect to the productive performance portability challenge. We are particularly interested in research that addresses the complexities of P3 for real-world applications and/or realistic workloads, the composibility challenges arising from bespoke solutions, and the desire to "future-proof" software. Because the P3 topic touches on so many aspects of HPC software development, we expect the workshop program will reflect a wide range of experiences and perspectives, including those from compiler, programming language and runtime experts; performance engineers; and domain scientists.


We encourage authors to submit papers describing novel research in all areas concerned with portability, performance, and productivity. Topics of interest include, but are not limited to:

  • P3 extensions to traditional HPC languages (e.g., C, C++, Fortran), libraries, and runtimes
  • Directives, libraries, domain specific languages and other abstractions that support P3
  • Algorithmic and application development techniques
  • P3 techniques specifically designed for use with legacy codes
  • Techniques for preparing applications for future architectural changes
  • Definitions of P3 metrics
  • Case studies documenting efforts at using state-of-the-art P3 tools and techniques

Submitted papers will be peer-reviewed and accepted papers will be published by IEEE Technical Consortium on High Performance Computing (TCHPC) and the IEEE Explore Digital Library. Please see the Submissions page for more detail about paper submissions.

Important Dates

  • 5/31/2019: Submissions website open
  • 8/26/2019: Submissions due date extended to 9/2/2019 9/5/2019 (11:59pm UTC-12)
  • 9/16/2019: Author notification extended to 9/25/2019
  • 10/11/2019: Camera ready submissions due (no extension will be granted)
  • 11/22/2019: Workshop (AM only)